soc.simple.test package

Submodules

soc.simple.test.test_core module

simple core test

related bugs:

• https://bugs.libre-soc.org/show_bug.cgi?id=363

class soc.simple.test.test_core.TestRunner(tst_data)

Bases: nmutil.formaltest.FHDLTestCase

run_all()

soc.simple.test.test_core.check_regs(dut, sim, core, test, code)

soc.simple.test.test_core.set_issue(core, dec2, sim)

soc.simple.test.test_core.set_mmu_spr(name, i, val, core)

soc.simple.test.test_core.setup_regs(pdecode2, core, test)

soc.simple.test.test_core.wait_for_busy_clear(cu)

soc.simple.test.test_core.wait_for_busy_hi(cu)

soc.simple.test.test_issuer module

simple core test, runs instructions from a TestMemory

related bugs:

• https://bugs.libre-soc.org/show_bug.cgi?id=363

soc.simple.test.test_issuer_svp64 module

test of SVP64 operations.

related bugs:

• https://bugs.libre-soc.org/show_bug.cgi?id=363

soc.simple.test.test_microwatt module

soc.simple.test.test_runner module

TestRunner class, runs TestIssuer instructions

related bugs:

• https://bugs.libre-soc.org/show_bug.cgi?id=363

class soc.simple.test.test_runner.TestRunner(tst_data, microwatt_mmu=False, rom=None, svp64=True)

Bases: nmutil.formaltest.FHDLTestCase

run_all()

soc.simple.test.test_runner.get_dmi(dmi, addr)

soc.simple.test.test_runner.set_dmi(dmi, addr, data)

soc.simple.test.test_runner.setup_i_memory(imem, startaddr, instructions)

Module contents