soc.minerva.test.test_cache.
L1CacheSpec
Bases: nmigen.hdl.ir.Elaboratable
nmigen.hdl.ir.Elaboratable
A cache read at a given address must either: - miss and start a cache refill; - hit and return the last refilled value for that address.
elaborate
L1CacheTestCase
Bases: nmutil.formaltest.FHDLTestCase
nmutil.formaltest.FHDLTestCase
check
test_2_ways
test_direct_mapped