ieee754.part_bits package

Submodules

ieee754.part_bits.bits module

Copyright (C) 2020 Luke Kenneth Casson Leighton <lkcl@lkcl.net> Copyright (C) 2020 Michael Nolan <mtnolan2640@gmail.com>

dynamically-partitionable “comparison” class, directly equivalent to Signal.__eq__, __gt__ and __ge__, except SIMD-partitionable

See:

• http://libre-riscv.org/3d_gpu/architecture/dynamic_simd/
• http://bugs.libre-riscv.org/show_bug.cgi?id=132
• http://bugs.libre-riscv.org/show_bug.cgi?id=171

class ieee754.part_bits.bits.PartitionedEqGtGe(width, partition_points)

Bases: nmigen.hdl.ir.Elaboratable

EQ = (const 2'd0)

GE = (const 2'd2)

GT = (const 2'd1)

elaborate(platform)

ports()

ieee754.part_bits.bits_combiner module

class ieee754.part_bits.bits_combiner.Combiner

Bases: nmigen.hdl.ir.Elaboratable

elaborate(platform)

class ieee754.part_bits.bits_combiner.GTCombiner(width)

Bases: nmigen.hdl.ir.Elaboratable

elaborate(platform)

ports()

ieee754.part_bits.xor module

Copyright (C) 2020 Luke Kenneth Casson Leighton <lkcl@lkcl.net>

dynamically-partitionable “xor” class, directly equivalent to Signal.xor() except SIMD-partitionable

See:

• http://libre-riscv.org/3d_gpu/architecture/dynamic_simd/logicops
• http://bugs.libre-riscv.org/show_bug.cgi?id=176

class ieee754.part_bits.xor.PartitionedXOR(width, partition_points)

Bases: nmigen.hdl.ir.Elaboratable

elaborate(platform)

Module contents